The present invention relates to an abrasive pad whose abrasive layer has a three-dimensional structure, and more particularly to an abrasive pad whose abrasive layer has a three-dimensional structure which is used for planarizing a semiconductor wafer by a CMP (chemical and mechanical polishing) process.
The CMP process is publicly known as a standard process for planarizing a semiconductor wafer in accordance with high integration of devices and multi-layered wiring. A basic structure of a CMP system includes two units, one for processing and the other for cleaning. The processing unit generally includes a head part for giving rotation and pressurization while maintaining a semiconductor wafer, a driving mechanism thereof, a platen to which a pad is attached to face the semiconductor, and a driving mechanism thereof as a basic structure. In addition, the processing unit includes a mechanism for conditioning (dressing) an abrasive pad, a mechanism for cleaning a wafer chuck surface, a mechanism for supplying a working fluid, and others.
Since the structure and characteristics of the abrasive pad give a great influence on the abrasion characteristics brought about by processing, a further improvement thereof is desired as a key technique for supporting the CMP process. The structure of the abrasive pad has a microscopic aspect and a macroscopic aspect, both of which give an influence on the abrasion characteristics. The microscopic structure represents the types of the abrasive grains and the binder, the foamed state, the surface conditions, and others, while the macroscopic structure represents the surface shapes such as holes, grooves, and projections.
Japanese Patent Kohyo Publication Hei 11-512874 discloses an abrasive pad for a semiconductor wafer, the abrasive layer of which has a regular three-dimensional structure. This abrasive pad can be used in the CMP process. Use of an abrasive layer having a three-dimensional structure restrains the problem of xe2x80x9cloadingxe2x80x9d, so that this abrasive pad provides stable abrasion and is excellent in durability.
However, an abrasive pad whose abrasive layer has a three-dimensional structure has a property that the performance of the abrasive grains is liable to give an influence on the abrasion characteristics. This raises a problem that it is difficult to sufficiently modify the finish of the abraded surface by the use of a general-purpose xcex1-alumina abrasive grains. Particularly in the CMP process, it is requested that the semiconductor wafer surface has a surface roughness of 1 to 2 nm Ry (maximum hight, JIS B 0601), and is free from OSF (oxidation-induced stacking fault), free from microscratches, and free from haze while ensuring a high degree of flatness.
However, if xcex1-alumina abrasive grains obtained by a conventional general production method are used in an abrasive material formed to have a three-dimensional structure, the frictional force at the time of abrasion is high, so that defects or scratches are liable to be generated on the abraded surface. On the other hand, use of expensive abrasive grains such as diamond increases the production cost of the abrasive pad.
The present invention has been made to solve the aforesaid problems of the prior art and an object thereof is to provide an abrasive pad for CMP having good friction properties and being inexpensive and excellent in durability without causing defects or scratches on the abraded surface of a semiconductor wafer.
The present invention provides an abrasive pad for CMP having a substrate and an abrasive layer disposed on the substrate, wherein said abrasive layer has a three-dimensional structure including a plurality of regularly arranged three-dimensional elements having a predetermined shape, and said abrasive layer comprises an abrasive composite containing advanced alumina abrasive grains produced by a CVD method and a binder as construction components, thereby aforesaid object of the present invention is achieved.